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	• Logic Synthesis for Field-Programmable Gate Arrays (The Springer International Series in Engineering and ... Rajeev Murgai, Robert K. Brayton, ... Springer, 1995 - 452 pages average customer review:based on 2 reviews view larger image
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Incredible resource

Gate array implementations differ from traditional logic design not just in scale, but in kind. A million- or billion-gate system is bigger than a student's 4-variable exercises in Karnaugh mapping, for sure. Logic implementation in terms of LUTs (as in Altera's and Xilinx's FPGAs) or muxes (as in Actel's) differs fundamentally from and-or-not logic, too. If you build tools that do LUT-level synthesis from behavioral specifications, you need this book.

This covers a wide range of advanced techniques needed for synthesis into current FPGAs. After a thorough introduction to FPGA basics, the authors start on logic optimization. The authors review traditional kinds of optimization, then move on to the different techniques that serve the different needs of designers with arbitrary N-input functions as their atoms. This includes not just optimizations for minimal area, but for minimal logic depth, too. Because of the intractability of the problems, the authors focus on heuristic algorithms. Quite a few are presented, often in terms of working tool implementations, and compared.

Unlike other books that discuss only combinational synthesis, this includes a lengthy section on mapping sequential logic into specific technologies. This isn't a logic design text, it doesn't say anything about reducing a problem statement to gates and registers. Instead, it starts at that point and explores techniques for mapping clocked logic into the idiosyncracies of a specific logic fabric. Discussion uses Xilinx 3000-family CLBs for demonstration purposes. The analysis, however, can be applied to similar kind of cell with logic, latches, and internal return paths. The authors omit mention of carry chains and other irregularities, but give exhaustive coverage within the basic feature set.

This is a text for the tool builder, not the logic designer. Despite the 1995 date of the edition reviewed here, the generality of the approaches keeps this relevant for even the newest offerings from Altera, Xilinx, and the rest. The authors say little about placement and routing, although they do address on-chip communication lines of various sorts. They omit the special needs of arithmetic synthesis, too, focussing instead on traditional kinds of combinational logic. These are editorial choices, though, not true weaknesses in this book.

The modern tool builder will be aware of more recent and ongoing innovations in synthesis, especially when dealing with the varied, specialized resources on today's chips. But even the most advanced of today's synthesis experts need occasional review or reference, and tomorrow's experts have to start somewhere. If you participate in this specialized field, this book must be on your shelf.

//wiredweird, reviewing the 1995 edition

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This book covers topics of Logic Synthesis in Interrelated manner,which gives u a feel of confidence for in depth knowledge of Logic Synthesis.

Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such systems since they allow rapid design revisions. However, the inherent performance limitations of software-programmable systems mean that they are inadequate for high-performance designs. Designers thus turned to gate arrays as a solution. User-programmable gate arrays (field-programmable gate arrays, FPGAs) have recently emerged and are changing the way electronic systems are designed and implemented. The growing complexity of the logic circuits that can be packed onto an FPGA chip means that it has become important to have automatic synthesis tools that implement logic functions on these architectures. Logic Synthesis for Field-Programmable Gate Arrays describes logic synthesis for both look-up table (LUT) and multiplexor-based architectures, with a balanced presentation of existing techniques together with algorithms and the system developed by the authors. Audience: A useful reference for VLSI designers, developers of computer-aided design tools, and anyone involved in or with FPGAs.

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